Invention Grant
- Patent Title: Dual-mode error-correction code/write-once memory codec
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Application No.: US15633835Application Date: 2017-06-27
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Publication No.: US10592333B2Publication Date: 2020-03-17
- Inventor: Sai Zhang , Yuming Zhu , Clive Bittlestone , Srinath Ramaswamy
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Michael A. Davis, Jr.; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F3/06 ; G11C29/52 ; H03M13/15 ; H03M13/00

Abstract:
A system for error correction code (ECC) management of write-once memory (WOM) codes includes, for example, a controller for selecting between one of a WOM (Write-Once Memory) mode and an ECC (error correction code) mode. A codec is arranged to operate in the selected mode. The codec while operating in the ECC mode is arranged to identify a bit position of at least one bit error in response to ECC parity bits of a first received data word. The codec while operating in the WOM mode is arranged to receive a WOM-encoded word from an addressed location in a WOM device, to receive a second received data word to be encoded and written to the addressed location, and to generate WOM-encoded word for writing to the addressed location in the WOM device. The WOM-encoded word for writing to the addressed location is optionally ECC encoded.
Public/Granted literature
- US20170293526A1 Dual-Mode Error-Correction Code/Write-Once Memory Codec Public/Granted day:2017-10-12
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