Invention Grant
- Patent Title: Method for performing netlist comparison based on pin connection relationship of components
-
Application No.: US15778156Application Date: 2016-08-26
-
Publication No.: US10592631B2Publication Date: 2020-03-17
- Inventor: Zhirui Liu , Zhongyu Mao
- Applicant: Guangzhou Fastprint Circuit Tech Co., Ltd. , Shenzhen Fastprint Circuit Tech Co., Ltd.
- Applicant Address: CN Guangzhou CN Shenzhen
- Assignee: Guangzhou Fastprint Circuit Tech Co., Ltd.,Shenzhen Fastprint Circuit Tech Co., Ltd.
- Current Assignee: Guangzhou Fastprint Circuit Tech Co., Ltd.,Shenzhen Fastprint Circuit Tech Co., Ltd.
- Current Assignee Address: CN Guangzhou CN Shenzhen
- Agency: Seyfarth Shaw LLP
- Priority: CN201510827279 20151124
- International Application: PCT/CN2016/096912 WO 20160826
- International Announcement: WO2017/088540 WO 20170601
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Disclosed is a method for performing netlist comparison based on a pin connection relationship of a component, comprising the steps: acquiring a schematic diagram netlist file generated by a schematic diagram, and acquiring a PCB netlist file generated by a PCB; reading a network in the schematic diagram netlist file, forming a netlist connection relationship corresponding to each network into a schematic diagram array, all schematic diagram arrays forming a schematic diagram array set; reading a network in the PCB netlist file, forming a netlist connection relationship corresponding to each network into a PCB array, all PCB arrays forming a PCB array set; and comparing the schematic diagram array set with the PCB array set, and outputting differences between the two array sets. The present disclosure merely compares the connection relationship of components. With regard to the condition where a pin connection relationship of an element does not change but a network name changes, occurring during the conversion of different pieces of EDA software, and the present disclosure can effectively guarantee the accuracy of a connection after a schematic diagram and a PCB network are converted. The present disclosure can be widely applied to netlist comparison systems of pin connection relationships of various EDA software components.
Public/Granted literature
- US20180341741A1 METHOD FOR PERFORMING NETLIST COMPARISON BASED ON PIN CONNECTION RELATIONSHIP OF COMPONENTS Public/Granted day:2018-11-29
Information query