Invention Grant
- Patent Title: Method of forming a heterojunction semiconductor device having integrated clamping device
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Application No.: US16215870Application Date: 2018-12-11
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Publication No.: US10593666B2Publication Date: 2020-03-17
- Inventor: Balaji Padmanabhan , Prasad Venkatraman , Zia Hossain , Chun-Li Liu , Jason McDonald , Ali Salih , Alexander Young
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agent Kevin B. Jackson
- Main IPC: H01L29/20
- IPC: H01L29/20 ; H01L27/06 ; H01L21/8258 ; H01L21/74 ; H01L23/367 ; H01L29/417 ; H01L29/778 ; H01L29/10 ; H01L27/02 ; H01L29/872 ; H01L23/48 ; H01L29/861

Abstract:
A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the first current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the second current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.
Public/Granted literature
- US20190123041A1 METHOD OF FORMING A HETEROJUNCTION SEMICONDUCTOR DEVICE HAVING INTEGRATED CLAMPING DEVICE Public/Granted day:2019-04-25
Information query
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