Invention Grant
- Patent Title: Methods of fabricating semiconductor structures and related semiconductor structures
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Application No.: US16052159Application Date: 2018-08-01
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Publication No.: US10593766B2Publication Date: 2020-03-17
- Inventor: John D. Hopkins
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/66 ; H01L29/788 ; H01L29/792 ; H01L27/11556 ; H01L27/11582

Abstract:
Methods of fabricating a semiconductor structure comprise forming an opening through a stack of alternating tier dielectric materials and tier control gate materials, and laterally removing a portion of each of the tier control gate materials to form control gate recesses. A charge blocking material comprising a charge trapping portion is formed on exposed surfaces of the tier dielectric materials and tier control gate materials in the opening. The control gate recesses are filled with a charge storage material. The method further comprises removing the charge trapping portion of the charge blocking material disposed horizontally between the charge storage material and an adjacent tier dielectric material to produce air gaps between the charge storage material and the adjacent tier dielectric material. The air gaps may be substantially filled with dielectric material or conductive material. Also disclosed are semiconductor structures obtained from such methods.
Public/Granted literature
- US20180350609A1 METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES AND RELATED SEMICONDUCTOR STRUCTURES Public/Granted day:2018-12-06
Information query
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