Invention Grant
- Patent Title: Semiconductor integrated circuit and reconfigurable semiconductor system
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Application No.: US16292167Application Date: 2019-03-04
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Publication No.: US10594321B1Publication Date: 2020-03-17
- Inventor: Masami Funyu
- Applicant: KABUSHIKI KAISHA TOSHIBA , TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA,TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Current Assignee: KABUSHIKI KAISHA TOSHIBA,TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JP2018-173577 20180918
- Main IPC: H03K19/177
- IPC: H03K19/177 ; H03K19/1776 ; G06F17/50 ; H03K19/17728 ; H03K19/173

Abstract:
A semiconductor integrated circuit includes a plurality of logic circuits each being configurable to perform a logic function according to configuration data set therein, a memory that stores configuration information for use in setting the configuration data in each of the plurality of logic circuits, a test circuit configured to perform a test for detecting an error in each logic circuit, and an output circuit configured to output information indicating whether the error exists in one or more of the logic circuits based on a result of the test. In response to the output of the information indicating that the error exists, the configuration information stored in the memory is updated with new configuration information for setting the configuration data of each of the logic circuits other than one or more logic circuits having the error.
Public/Granted literature
- US20200091915A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND RECONFIGURABLE SEMICONDUCTOR SYSTEM Public/Granted day:2020-03-19
Information query
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