Tamper-respondent assemblies are provided which include an enclosure assembly mounted to a circuit board and enclosing an electronic component(s) within a secure volume. The enclosure assembly includes an enclosure with an edge surface coupled to the circuit board, and a tamper-respondent sensor. The tamper-respondent sensor covers the edge surface and an inner surface of the enclosure. The sensor includes multiple layers, and at least one tamper-detect circuit. The tamper-detect circuit(s) includes a conductive trace(s) in a tamper-detect pattern covered, at least in part, by at least one layer of the multiple layers. The at least one layer is partially removed to provide exposed regions and unexposed regions of the conductive trace(s) at the edge surface of the enclosure. The conductive trace(s) is contacted where exposed by an adhesive securing the sensor to the circuit board. A monitor circuit monitors the tamper-detect circuit(s) for a tamper event.