An image forming apparatus includes: a fixer including a halogen heater; and a hardware processor that controls power supplied to the halogen heater, wherein the hardware processor switches, according to a state of the fixer, a control state for controlling the power supplied to the halogen heater between a first control state in which a lower limit of an amount of power per cycle of the power supplied to the halogen heater is set to a first value and a second control state in which the lower limit of the amount of power per cycle of the power supplied to the halogen heater is set to a second value lower than the first value.