Invention Grant
- Patent Title: High level synthesis apparatus, high level synthesis method, and computer readable medium
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Application No.: US16061442Application Date: 2016-03-10
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Publication No.: US10599803B2Publication Date: 2020-03-24
- Inventor: Ryo Yamamoto
- Applicant: MITSUBISHI ELECTRIC CORPORATION
- Applicant Address: JP Tokyo
- Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Birch, Stewart, Kolasch & Birch, LLP.
- International Application: PCT/JP2016/057668 WO 20160310
- International Announcement: WO2017/154183 WO 20170914
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A structure determination unit (112) obtains an operational description (511) and determines a candidate of a circuit structure applicable to a plurality of execution units as a structure candidate, the operational description (511) describing an operation of a circuit and including the plurality of execution units. A decision unit (113) calculates, as a circuit characteristic (522), a characteristic of the circuit when the circuit structure of the plurality of execution units is the structure candidate and outputs the structure candidate as a determined circuit structure (310) when the circuit characteristic (522) meets a threshold (521). A high level synthesis unit (140) performs high level synthesis on the operational description (511) so that the circuit structure of the plurality of execution units becomes the determined circuit structure (310).
Public/Granted literature
- US20190303513A1 HIGH LEVEL SYNTHESIS APPARATUS, HIGH LEVEL SYNTHESIS METHOD, AND COMPUTER READABLE MEDIUM Public/Granted day:2019-10-03
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