Invention Grant
- Patent Title: Compressed bounding volume hierarchy
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Application No.: US15924112Application Date: 2018-03-16
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Publication No.: US10600231B2Publication Date: 2020-03-24
- Inventor: Sven Woop , Carsten Benthin , Rasmus Barringer , Tomas G. Akenine-Moller
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Womble Bond Dickinson (US) LLP
- Main IPC: G06T15/00
- IPC: G06T15/00 ; G06T15/06 ; G06T15/08

Abstract:
Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.
Public/Granted literature
- US20190259195A1 COMPRESSED BOUNDING VOLUME HIERARCHY Public/Granted day:2019-08-22
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T15/00 | 3D〔三维〕图像的加工 |