Invention Grant
- Patent Title: Semiconductor device manufacturing method
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Application No.: US15445988Application Date: 2017-03-01
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Publication No.: US10600773B2Publication Date: 2020-03-24
- Inventor: Yuji Karakane , Masatoshi Fukuda , Soichi Homma , Naoyuki Komuta , Yukifumi Oyama
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JP2016-176671 20160909
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L21/683 ; H01L23/00 ; H01L25/18 ; H01L23/31

Abstract:
A semiconductor device manufacturing method includes stacking a second semiconductor chip on a first surface of a first semiconductor chip such that the at bump electrode overlies the position of a first through silicon via in the first semiconductor chip, stacking a third semiconductor chip on the second semiconductor chip such that a second bump electrode on the second semiconductor chip overlies the position of a second through silicon via in the third semiconductor chip to form a chip stacked body, connecting the first and second bump electrodes of the chip stacked body to the first and the second through silicon vias by reflowing the bump material, placing the chip stacked body on the first substrate such that the first surface of the first semiconductor chip faces the second surface, and sealing the second surface and the first, second, and third semiconductor chips with a filling resin.
Public/Granted literature
- US20180076187A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2018-03-15
Information query
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