A T-coil IC includes a first inductor on an Mx layer. The first inductor has n turns, where n is at least 1⅞ turns. The T-coil IC further includes a second inductor on an Mx−1 layer. The second inductor has n turns. The first inductor and the second inductor are connected together at a node. The first inductor on the Mx layer and the second inductor on the Mx−1 layer are mirror symmetric to each other. The T-coil IC further includes a center tap on an Mx−2−y layer, where y≥0. The center tap is connected to the first inductor and the second inductor by a via stack at the node. In one configuration, n is 1⅞+0.5z turns, where z≥0. An effective bridge capacitance of the T-coil IC may be approximately 25 fF.