Invention Grant
- Patent Title: Multiplexing method for scheduled frames in an ethernet switch
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Application No.: US16064361Application Date: 2017-01-25
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Publication No.: US10601733B2Publication Date: 2020-03-24
- Inventor: Christophe Mangin
- Applicant: MITSUBISHI ELECTRIC CORPORATION
- Applicant Address: JP Tokyo
- Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: EP16305268 20160309
- International Application: PCT/JP2017/003498 WO 20170125
- International Announcement: WO2017/154418 WO 20170914
- Main IPC: H04L12/931
- IPC: H04L12/931 ; H04L12/875 ; H04L12/869 ; H04L12/865 ; H04L12/863 ; H04L12/861 ; H04L12/833

Abstract:
The method comprises the steps of: a) providing a plurality of memory buffers, associated to respective indexes of priority, each buffer comprising one queue of frames having a same index of priority, b) sorting the received frames in a chosen buffer according to their index of priority, c) in each buffer, sorting the frames according to their respective timestamps, for ordering the queue of frames in each buffer from the earliest received frame on top of the queue to the latest received frame at the bottom of the queue, and d) feeding the transmitting ports with each frame or block of frame to transmit, in an order determined according to the index of priority of the frame, as well as an order of the frame or of the block of frame in the queue associated to the index of priority of the frame.
Public/Granted literature
- US20190007344A1 MULTIPLEXING METHOD FOR SCHEDULED FRAMES IN AN ETHERNET SWITCH Public/Granted day:2019-01-03
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