Invention Grant
- Patent Title: Systems and methods for optimal trim calibrations in integrated circuits
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Application No.: US14975193Application Date: 2015-12-18
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Publication No.: US10606723B2Publication Date: 2020-03-31
- Inventor: Pankaj Bongale , Partha Ghosh , Rubin Ajit Parekhji
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Michelle F. Murray; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/263 ; G06F11/24 ; G01R31/28 ; G06F11/22 ; G06F11/273

Abstract:
A test circuit that includes a circuit to be calibrated, an error generation circuit, and a simplex circuit coupled to one another. The circuit to be calibrated is configured to implement a first plurality of trim codes as calibration parameters for a corresponding plurality of components of the circuit to be calibrated and generate a first actual output. The error generation circuit is configured to generate a first error signal based on a difference between the first actual output and an expected output of the circuit to be calibrated. The simplex circuit is configured to receive the first error signal from the error generation circuit, generate a second plurality of trim codes utilizing a simplex algorithm based on the first error signal, and transmit the second plurality of trim codes to the circuit to be calibrated.
Public/Granted literature
- US20170177456A1 SYSTEMS AND METHODS FOR OPTIMAL TRIM CALIBRATIONS IN INTEGRATED CIRCUITS Public/Granted day:2017-06-22
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