Invention Grant
- Patent Title: Semiconductor device and method of forming interconnect substrate for FO-WLCSP
-
Application No.: US15584697Application Date: 2017-05-02
-
Publication No.: US10607946B2Publication Date: 2020-03-31
- Inventor: Yaojian Lin , Jianmin Fang , Xia Feng , Kang Chen
- Applicant: JCET Semiconductor (Shaoxing) Co., Ltd
- Applicant Address: CN
- Assignee: JCET Semiconductor (Shaoxing) Co., Ltd.
- Current Assignee: JCET Semiconductor (Shaoxing) Co., Ltd.
- Current Assignee Address: CN
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L25/10 ; H01L25/00 ; H01L23/498 ; H01L23/538 ; H01L21/683 ; H01L21/48

Abstract:
A semiconductor device has a first encapsulant deposited over a first carrier. A plurality of conductive vias is formed through the first encapsulant to provide an interconnect substrate. A first semiconductor die is mounted over a second carrier. The interconnect substrate is mounted over the second carrier adjacent to the first semiconductor die. A second semiconductor die is mounted over the second carrier adjacent to the interconnect substrate. A second encapsulant is deposited over the first and second semiconductor die, interconnect substrate, and second carrier. A first interconnect structure is formed over a first surface of the second encapsulant and electrically connected to the conductive vias. A second interconnect structure is formed over a second surface of the second encapsulant and electrically connected to the conductive vias to make the Fo-WLCSP stackable. Additional semiconductor die can be mounted over the first and second semiconductor die in a PoP arrangement.
Public/Granted literature
- US20170236788A1 Semiconductor Device and Method of Forming Interconnect Substrate for FO-WLCSP Public/Granted day:2017-08-17
Information query
IPC分类: