Invention Grant
- Patent Title: Method for making CMOS image sensor including stacked semiconductor chips and readout circuitry including a superlattice
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Application No.: US15842993Application Date: 2017-12-15
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Publication No.: US10608043B2Publication Date: 2020-03-31
- Inventor: Yi-Ann Chen , Abid Husain , Hideki Takeuchi
- Applicant: ATOMERA INCORPORATED
- Applicant Address: US CA Los Gatos
- Assignee: ATOMERA INCORPORATION
- Current Assignee: ATOMERA INCORPORATION
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L29/15 ; H01L29/10 ; H01L29/66 ; H01L29/16 ; H01L21/02 ; H01L29/78

Abstract:
A method for making a CMOS image sensor may include forming a first semiconductor chip including an array of image sensor pixels and readout circuitry electrically connected thereto, forming a second semiconductor chip comprising image processing circuitry electrically connected to the readout circuitry, and coupling the first semiconductor chip and the second semiconductor chip together in a stack. The readout circuitry may include a plurality of transistors each including spaced apart source and drain regions, a superlattice channel extending between the source and drain regions, and a gate including a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.
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Information query
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