Invention Grant
- Patent Title: I-shaped gate electrode for improved sub-threshold MOSFET performance
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Application No.: US15679908Application Date: 2017-08-17
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Publication No.: US10608110B2Publication Date: 2020-03-31
- Inventor: Amitava Chatterjee
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/28 ; H01L29/423 ; H01L21/3105 ; H01L21/762 ; H01L29/06 ; H01L29/08 ; H01L29/49 ; H01L29/66 ; H01L21/8238

Abstract:
Metal-oxide-semiconductor (MOS) transistors with reduced subthreshold conduction, and methods of fabricating the same. Transistor gate structures are fabricated in these transistors of a shape and dimension as to overlap onto the active region from the interface between isolation dielectric structures and the transistor active areas. Minimum channel length conduction is therefore not available at the isolation-to-active interface, but rather the channel length along that interface is substantially lengthened, reducing off-state conduction.
Public/Granted literature
- US20170345929A1 I-SHAPED GATE ELECTRODE FOR IMPROVED SUB-THRESHOLD MOSFET PERFORMANCE Public/Granted day:2017-11-30
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