Invention Grant
- Patent Title: Internal voltage generation circuit
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Application No.: US16283037Application Date: 2019-02-22
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Publication No.: US10608529B2Publication Date: 2020-03-31
- Inventor: Eiji Aoki , Yoshinao Morikawa
- Applicant: SHARP KABUSHIKI KAISHA
- Applicant Address: JP Sakai, Osaka
- Assignee: SHARP KABUSHIKI KAISHA
- Current Assignee: SHARP KABUSHIKI KAISHA
- Current Assignee Address: JP Sakai, Osaka
- Agency: ScienBiziP, P.C.
- Priority: JP2018-035709 20180228
- Main IPC: G05F1/10
- IPC: G05F1/10 ; H02M3/07 ; H04N5/335

Abstract:
An internal voltage veneration circuit includes negative voltage generation circuits of a first type and a second type, and the negative voltage generation circuits of the first type and the second type are connected parallel to each other. A drive signal is input to a charge pump circuit from a signal drive circuit in opposite phases in the negative voltage generation circuits of the first type and in the negative voltage generation circuits of the second type. A plurality of pairs of a negative voltage generation circuit of the first type and a negative voltage generation circuit of the second type are disposed, and the negative voltage generation circuit of the first type and the negative voltage generation circuit of the second type are located adjacent to each other.
Public/Granted literature
- US20190267893A1 INTERNAL VOLTAGE GENERATION CIRCUIT Public/Granted day:2019-08-29
Information query
IPC分类: