Invention Grant
- Patent Title: Circuit device
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Application No.: US16495428Application Date: 2018-03-19
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Publication No.: US10609811B2Publication Date: 2020-03-31
- Inventor: Shungo Hiratani , Hideaki Tahara , Yuuichi Hattori , Akira Haraguchi , Jun Ikeda , Arinobu Nakamura
- Applicant: AutoNetworks Technologies, Ltd. , Sumitomo Wiring Systems, Ltd. , Sumitomo Electric Industries, Ltd.
- Applicant Address: JP Yokkaichi, Mie JP Yokkaichi, Mie JP Osaka-Shi, Osaka
- Assignee: AutoNetworks Technologies, Ltd.,Sumitomo Wiring Systems, Ltd.,Sumitomo Electric Industries, Ltd.
- Current Assignee: AutoNetworks Technologies, Ltd.,Sumitomo Wiring Systems, Ltd.,Sumitomo Electric Industries, Ltd.
- Current Assignee Address: JP Yokkaichi, Mie JP Yokkaichi, Mie JP Osaka-Shi, Osaka
- Agency: Honigman LLP
- Priority: JP2017-068332 20170330
- International Application: PCT/JP2018/010715 WO 20180319
- International Announcement: WO2018/180671 WO 20181004
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K5/00

Abstract:
A conductor is placed on a first placement portion of a heat dissipation member with an insulation member interposed therebetween. An FET is electrically connected to the conductor. When current flows between the drain and the source of the FET, the FET generates heat. A second placement portion of a circuit board is placed on the conductor. The conductor and the insulation member are sandwiched between the first placement portion and the second placement portion. In the heat dissipation member, a first extension portion extends from the first placement portion, and in the circuit board, a second extension portion extends from the second placement portion. The first extension portion is located opposite to and is spaced apart from the second extension portion, and a microcomputer is placed on an upper surface of the second extension portion. The microcomputer outputs a control signal for turning the FET ON or OFF.
Public/Granted literature
- US20200077509A1 CIRCUIT DEVICE Public/Granted day:2020-03-05
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