Invention Grant
- Patent Title: Reducing translation latency within a memory management unit using external caching structures
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Application No.: US15819458Application Date: 2017-11-21
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Publication No.: US10649902B2Publication Date: 2020-05-12
- Inventor: Guy L. Guthrie , Jody B. Joyner , Ronald N. Kalla , Michael S. Siegel , Jeffrey A. Stuecheli , Charles D. Wait , Frederick J. Ziegler
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Nathan M. Rau
- Main IPC: G06F12/0864
- IPC: G06F12/0864 ; G06F12/1009 ; G06F12/0888 ; G06F12/0897 ; G06F12/1027

Abstract:
Reducing translation latency within a memory management unit (MMU) using external caching structures including requesting, by the MMU on a node, page table entry (PTE) data and coherent ownership of the PTE data from a page table in memory; receiving, by the MMU, the PTE data, a source flag, and an indication that the MMU has coherent ownership of the PTE data, wherein the source flag identifies a source location of the PTE data; performing a lateral cast out to a local high-level cache on the node in response to determining that the source flag indicates that the source location of the PTE data is external to the node; and directing at least one subsequent request for the PTE data to the local high-level cache.
Public/Granted literature
- US20190065380A1 REDUCING TRANSLATION LATENCY WITHIN A MEMORY MANAGEMENT UNIT USING EXTERNAL CACHING STRUCTURES Public/Granted day:2019-02-28
Information query
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