Invention Grant
- Patent Title: Logical block addressing range collision crawler
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Application No.: US16137261Application Date: 2018-09-20
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Publication No.: US10649909B2Publication Date: 2020-05-12
- Inventor: Cory Lappi , Darin Edward Gerhart , Nicholas Edward Ortmeier , William Jared Walker
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson & Sheridan, LLP
- Main IPC: G06F12/1009
- IPC: G06F12/1009

Abstract:
A device having a controller configured to execute a range crawler algorithm residing in firmware or hardware and a data table containing one or more range entries (RE's), where each of the RE's is part of a logical block address (LBA) span associated with a command instruction, and where each LBA span has one or more LBA ranges, and where each LBA range is made of one or more sequential LBA's. The device also includes a collision bitmap configured to store data associated with RE collisions between one or more LBA's and a command dispatcher configured to release selected LBA ranges that are not associated with a RE collision. The range crawler algorithm is configured to search the data table to detect collisions between the RE's.
Public/Granted literature
- US20190384719A1 LOGICAL BLOCK ADDRESSING RANGECOLLISION CRAWLER Public/Granted day:2019-12-19
Information query
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