Invention Grant
- Patent Title: Post-passivation interconnect structure and method of forming the same
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Application No.: US16048989Application Date: 2018-07-30
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Publication No.: US10651055B2Publication Date: 2020-05-12
- Inventor: Hung-Jen Lin , Tsung-Ding Wang , Chien-Hsun Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/56 ; H01L23/31 ; H01L23/00 ; H01L23/525
Abstract:
A semiconductor device includes a passivation layer formed on a semiconductor substrate, a protective layer overlying the passivation layer and having an opening, an interconnect structure formed in the opening of the protective layer, a bump formed on the interconnect structure, and a molding compound layer overlying the interconnect structure and being in physical contact with a lower portion of the bump.
Public/Granted literature
- US20180337066A1 Post-Passivation Interconnect Structure and Method of Forming the Same Public/Granted day:2018-11-22
Information query
IPC分类:
