- Patent Title: Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped and/or a via disposed for mitigating electromigration
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Application No.: US15913530Application Date: 2018-03-06
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Publication No.: US10651201B2Publication Date: 2020-05-12
- Inventor: Ha-young Kim , Chang-beom Kim , Hyun-jeong Roh , Tae-joong Song , Dal-hee Lee , Sung-we Cho
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@48b8658a com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4676a07f
- Main IPC: H01L27/118
- IPC: H01L27/118 ; H01L27/02

Abstract:
An integrated circuit includes a first conductive pattern in a first conductive layer, a second conductive pattern in a second conductive layer over the first conductive layer, and a via electrically connected with the first conductive pattern and the second conductive pattern to allow a first current flowing from the first conductive pattern to the second conductive pattern and a second current flowing from the second conductive pattern to the first conductive pattern to pass through at different times. The via is placed on the first conductive pattern so that a path of the first current does not overlap with a path of the second current in the first conductive pattern.
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