Predictive spatial digital design of experiment for advanced semiconductor process optimization and control
Abstract:
This disclosure describes methods and systems for building a spatial model to predict performance of processing chamber, and using the spatial model to converge faster to a desired process during the process development phase. Specifically, the method obtains virtual metrology (VM) data from sensors of the chamber and on-board metrology (OBM) data from devices on the wafers; obtains in-line metrology data from precision scanning electron microscope (SEM); and also obtains an empirical process model for a given process. The empirical process model is calibrated by using the in-line metrology data as reference. A predictive model is built by refining the empirical process model by a machine-learning engine that receives customized metrology data and outputs one or more spatial maps of the wafer for one or more dimensions of interest across the wafer without physically processing any further wafers, i.e. by performing spatial digital design of experiment (Spatial DoE).
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