Invention Grant
- Patent Title: Word line pulse width control circuit in static random access memory
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Application No.: US15969834Application Date: 2018-05-03
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Publication No.: US10658026B2Publication Date: 2020-05-19
- Inventor: Anjana Singh , Cheng Hung Lee , Hau-Tai Shieh , Yi-Tzu Chen
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: G11C8/08
- IPC: G11C8/08 ; G11C11/418

Abstract:
Devices and methods are provided for word line pulse width control for a static random access memory (SRAM) devices. An inverter within a pre-decoder circuit receives a first input of a clocked address. The inverter determines an output based on the clocked address. An electrical load of a decoder driver circuit of the SRAM device is modified based on the output. Current to a transistor coupled at a common node is provided. The transistor is configured to electrically couple a plurality of transistors of the decoder driver circuit within the SRAM device.
Public/Granted literature
- US20180342288A1 Word Line Pulse Width Control Circuit in Static Random Access Memory Public/Granted day:2018-11-29
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