Invention Grant
- Patent Title: Memory system and method for controlling memory system
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Application No.: US15919492Application Date: 2018-03-13
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Publication No.: US10658055B2Publication Date: 2020-05-19
- Inventor: Kazutaka Takizawa , Yoshihisa Kojima , Masaaki Niijima
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: White & Case LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@294b5bce
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/04

Abstract:
According to one embodiment, a memory system includes a memory device and a controller. The controller is configured to make the memory device apply a first verify voltage to a first word line for determining whether writing of a first data value into a first cell transistor has been completed. The controller is configured to make the memory device apply a second verify voltage to a second word line for determining whether writing of the first data value into a second cell transistor has been completed. The second verify voltage is different from the first verify voltage.
Public/Granted literature
- US20180277229A1 MEMORY SYSTEM AND METHOD FOR CONTROLLING MEMORY SYSTEM Public/Granted day:2018-09-27
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