Invention Grant
- Patent Title: Vertically stacked multichip modules
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Application No.: US16564772Application Date: 2019-09-09
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Publication No.: US10658342B2Publication Date: 2020-05-19
- Inventor: Mankyo Jong , Changyoung Park
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Brake Hughes Bellermann LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/498 ; H01L25/00 ; H01L23/00 ; H01L23/473

Abstract:
In a general aspect, a method for producing a circuit assembly can include coupling a first side of a first semiconductor die with a first side of a first substrate and a first side of a second substrate, the first substrate having a first electrically isolated metal layer disposed on a second side. The method can also include coupling a first side of a second semiconductor die with a second side of the second substrate and a first side of a third substrate, the third substrate having a second electrically isolated metal layer disposed on a second side. The method can further include coupling at least one conductive connector between the second substrate and the third substrate, the at least one conductive connector electrically coupling the second substrate with the third substrate.
Public/Granted literature
- US20190393196A1 VERTICALLY STACKED MULTICHIP MODULES Public/Granted day:2019-12-26
Information query
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