Invention Grant
- Patent Title: Semiconductor integrated circuit device
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Application No.: US16138214Application Date: 2018-09-21
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Publication No.: US10658504B2Publication Date: 2020-05-19
- Inventor: Masaharu Yamaji
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1e5c7a71
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/08 ; H01L27/06 ; H01L21/761 ; H01L29/739 ; H01L29/40 ; H03K19/0185

Abstract:
A p−-type isolation region is provided at a part between a p-type ground region and a circuit region (a high potential region and an intermediate potential region) in an n-type well region. The p−-type isolation region is electrically connected with a H-VDD pad and an n+-type drain region of a HVNMOS. The p−-type isolation region has between n+-type pickup connect regions and between n+-type drain regions of two of the HVNMOSs, a protruding part (a T-shaped part, an L-shaped part, a partial U-shaped part) or an additional part that protrudes toward a p-ground region.
Public/Granted literature
- US20190157450A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2019-05-23
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