A multi-port PUF circuit based on MOSFET current division deviations comprises a reference source, a row decoder, a column decoder, a timing controller and 32 PUF arrays. Each PUF array comprises 512 PUF cells arranged in 128 rows and 4 columns, an arbiter, a 1st inverter, a 2nd inverter, a 3rd inverter, a 4th inverter and eight transmission gates. The reference source is connected to the PUF arrays. The mth output terminal of the row decoder is connected to the mth row selective signal input terminals of the 32 PUF arrays. The jth output terminal of the column decoder is connected to the jth selective signal input terminals of the 32 PUF arrays. The 1st output terminal of the timing controller is connected to the control terminal of the row decoder. The 2nd output terminal of the timing controller is connected to the control terminal of the column decoder. The multi-port PUF circuit has the advantages of small circuit area and low power consumption while ensuring circuit performance.