Invention Grant
- Patent Title: Speeding up younger store instruction execution after a sync instruction
-
Application No.: US16117058Application Date: 2018-08-30
-
Publication No.: US10664275B2Publication Date: 2020-05-26
- Inventor: Susan E. Eisen , Hung Q. Le , Bryan J. Lloyd , Dung Q. Nguyen , David S. Ray , Benjamin W. Stolt , Shih-Hsiung S. Tung
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Stephen J. Walder, Jr.; Nathan Rau
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38

Abstract:
Mechanisms are provided, in a processor, for executing instructions that are younger than a previously dispatched synchronization (sync) instruction is provided. An instruction sequencer unit of the processor dispatches a sync instruction. The sync instruction is sent to a nest of one or more devices outside of the processor. The instruction sequencer unit dispatches a subsequent instruction after dispatching the sync instruction. The dispatching of the subsequent instruction after dispatching the sync instruction is performed prior to receiving a sync acknowledgement response from the nest. The instruction sequencer unit performs a completion of the subsequent instruction based on whether completion of the subsequent instruction is dependent upon receiving the sync acknowledgement from the nest and completion of the sync instruction.
Public/Granted literature
- US20190012175A1 Speeding Up Younger Store Instruction Execution After a Sync Instruction Public/Granted day:2019-01-10
Information query