Invention Grant
- Patent Title: Semiconductor device and memory system for combining reversed-phase data
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Application No.: US16116363Application Date: 2018-08-29
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Publication No.: US10665274B2Publication Date: 2020-05-26
- Inventor: Yohei Yasuda
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@31f09b4d
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C7/22 ; G11C19/28 ; G11C7/06 ; H03K19/0944 ; H03K19/0185 ; G11C5/06 ; H03K3/3562

Abstract:
A semiconductor device having a first inverter electrically connected to a first node. A second inverter is electrically connected to a second node. A third clocked inverter is electrically connected to an output node of the first inverter. A fourth clocked inverter is electrically connected to an output node of the second inverter. A third inverter is electrically connected to an output node of a first clocked inverter and an output node of a second clocked inverter. A fourth inverter is electrically connected to an output node of the third clocked inverter and an output node of the fourth clocked inverter. A comparison circuit is electrically connected to an output node of the third inverter and an output node of the fourth inverter.
Public/Granted literature
- US20190287580A1 SEMICONDUCTOR DEVICE AND MEMORY SYSTEM Public/Granted day:2019-09-19
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