Invention Grant
- Patent Title: Memory circuit provided with variable-resistance element
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Application No.: US15573904Application Date: 2016-05-16
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Publication No.: US10665282B2Publication Date: 2020-05-26
- Inventor: Hiroki Koike , Tetsuo Endoh
- Applicant: TOHOKU UNIVERSITY
- Applicant Address: JP Sendai-Shi
- Assignee: Tohoku University
- Current Assignee: Tohoku University
- Current Assignee Address: JP Sendai-Shi
- Agency: Greer Burns & Crain Ltd.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@9b3393f
- International Application: PCT/JP2016/064531 WO 20160516
- International Announcement: WO2016/186086 WO 20161124
- Main IPC: G11C11/16
- IPC: G11C11/16

Abstract:
A memory circuit (11) includes: a memory cell (MCij) including a variable-resistance element in which a resistance value varies substantially between two levels; a resistance-voltage conversion circuit that converts the resistance value of a memory cell (MCij) to be read into a data voltage; a reference circuit (RCi) including a series circuit of a variable-resistance element and a linear resistor, the variable-resistance element including substantially the same configuration as the configuration of the variable-resistance element included in the memory cell MCij and being set to a lower resistance of two levels; a reference voltage conversion circuit that converts the resistance value of the reference circuit (RCi) into a reference voltage; and a sense amplifier (SA) that determines data stored in the memory cell (MCij) by comparing the data voltage with the reference voltage.
Public/Granted literature
- US20180350419A1 MEMORY CIRCUIT PROVIDED WITH VARIABLE-RESISTANCE ELEMENT Public/Granted day:2018-12-06
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