Devices and methods for sensing a memory cell using a charge transfer device are described. In some examples, the charge transfer device may be coupled with an input transistor of a differential transistor pair that may be coupled with a sense component. The differential transistor pair may be configured to isolate the sense component from the charge transfer device during a read operation. To read the memory cell, a gate of the charge transfer device may be charged to a first voltage. Subsequently, a digit line may be biased to a second voltage by discharging the memory cell onto the digit line. A charge may be transferred, using the charge transfer device, between the digit line and a gate of the input transistor such that the sense component may determine a logic state stored on the memory cell based on the first voltage and the second voltage.