Invention Grant
- Patent Title: Apparatuses and methods including anti-fuses and for reading and programming of same
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Application No.: US16357666Application Date: 2019-03-19
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Publication No.: US10665311B2Publication Date: 2020-05-26
- Inventor: Shinichi Miyatake
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C17/16
- IPC: G11C17/16 ; G11C17/18 ; G11C11/4074 ; H01L23/525 ; G11C29/00 ; G11C29/02 ; G11C11/401

Abstract:
Apparatuses and methods including anti-fuses and for reading and programming same are disclosed herein. An example apparatus may include an anti-fuse element comprising first, second, and third transistors coupled in series between first and second nodes such that the second transistor is between the first and third transistors. The second transistor is configured to be operated such that a punch-through current flows through the second transistor to indicate that the anti-fuse element has been programmed.
Public/Granted literature
- US20190214103A1 APPARATUSES AND METHODS INCLUDING ANTI-FUSES AND FOR READING AND PROGRAMMING OF SAME Public/Granted day:2019-07-11
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