Invention Grant
- Patent Title: Package assembly
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Application No.: US16221986Application Date: 2018-12-17
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Publication No.: US10665565B2Publication Date: 2020-05-26
- Inventor: Hung-Jen Lin , Tsung-Ding Wang , Chien-Hsiun Lee , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L23/31 ; H01L21/768 ; H01L23/525

Abstract:
The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a bump structure disposed on a first substrate and a molding compound in physical contact with the bump structure. The bump structure protrudes from the molding compound. A conductive region is on a second substrate and contacts the bump structure. A no-flow underfill (NUF) material is vertically between the molding compound and the second substrate and laterally surrounds the bump structure. The NUF material is separated from the molding compound.
Public/Granted literature
- US20190123016A1 PACKAGE ASSEMBLY Public/Granted day:2019-04-25
Information query
IPC分类: