Invention Grant
- Patent Title: Power semiconductor device integrated with ESD protection circuit under source pad, drain pad, and/or gate pad
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Application No.: US15468133Application Date: 2017-03-24
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Publication No.: US10665709B2Publication Date: 2020-05-26
- Inventor: Li-Fan Lin , Po-Chin Peng
- Applicant: DELTA ELECTRONICS, INC.
- Applicant Address: TW Taoyuan
- Assignee: DELTA ELECTRONICS, INC.
- Current Assignee: DELTA ELECTRONICS, INC.
- Current Assignee Address: TW Taoyuan
- Agency: CKC & Partners Co., LLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@9f5df69 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@37843c01 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@69db7680
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L23/535 ; H01L29/40 ; H01L29/417 ; H01L23/00 ; H01L23/482 ; H01L29/20 ; H01L27/06 ; H01L27/02 ; H01L29/10 ; H01L21/8252
Abstract:
A semiconductor device includes a substrate, a power device, a protection circuit, a dielectric layer, a drain pad, a source pad, and a gate pad. The power device and the protection circuit are disposed on the substrate. The power device includes a drain electrode, a source electrode, and a gate electrode. The protection circuit has a first terminal electrically connected with the source pad and a second terminal electrically connected with the gate pad. The dielectric layer is disposed on the power device and the protection circuit. The drain pad, the source pad, and the gate pad are disposed on the dielectric layer and respectively electrically connected with the drain electrode, the source electrode, and the gate electrode. At least part of the protection circuit is disposed under the source pad, the gate pad, or the drain pad.
Public/Granted literature
- US20170194477A1 SEMICONDUCTOR DEVICE Public/Granted day:2017-07-06
Information query
IPC分类:
