A memory device and an operation method thereof are provided. The memory device includes a semiconductor substrate and an oxide-nitride-oxide (ONO) gate structure located on the semiconductor substrate. The ONO gate structure includes a bottom oxide layer, a top oxide layer and a nitride layer. The nitride layer is located between the bottom oxide layer and the top oxide layer. The bottom oxide layer is located closer to the semiconductor substrate than the top oxide layer. The bottom oxide layer has a first thickness, and the top oxide layer has a second thickness smaller the first thickness. The operation method includes an erasing operation and a programming operation. Electrons are attracted into the ONO gate structure through the bottom oxide layer in the programming operation. Electrons trapped in the ONO gate structure escape from the ONO gate structure through the top oxide layer.