A clocked comparator includes an upper-side sampling latch configured to output a first decision in accordance with a detection of a sign of an input voltage signal plus an offset voltage at an edge of a clock signal; a lower-side sampling latch configured to output a second decision in accordance with a detection of a sign of the input voltage signal minus the offset voltage at the edge of the clock signal; and a decision-arbitrating latch configured to receive the first decision and the second decision and output a final decision in accordance with whichever one of the first decision and the second decision that is resolved earlier.