Invention Grant
- Patent Title: Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays
-
Application No.: US15790583Application Date: 2017-10-23
-
Publication No.: US10671529B2Publication Date: 2020-06-02
- Inventor: Chi Weon Yoon , Dong Hyuk Chae , Sang-Wan Nam , Jung-Yun Yun
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@16f55aac
- Main IPC: G06F12/06
- IPC: G06F12/06 ; G11C5/02 ; G11C16/04 ; G11C11/56 ; G11C8/10 ; G06F3/06 ; G11C16/08 ; G11C16/24

Abstract:
At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where “k” is 2 or a natural number greater than 2.
Public/Granted literature
- US20180046574A1 ADDRESS SCHEDULING METHODS FOR NON-VOLATILE MEMORY DEVICES WITH THREE-DIMENSIONAL MEMORY CELL ARRAYS Public/Granted day:2018-02-15
Information query