Invention Grant
- Patent Title: Memory controller and memory system for suppression of fluctuation of voltage drop
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Application No.: US16072789Application Date: 2016-12-01
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Publication No.: US10672472B2Publication Date: 2020-06-02
- Inventor: Haruhiko Terada
- Applicant: SONY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Sony Corporation
- Current Assignee: Sony Corporation
- Current Assignee Address: JP Tokyo
- Agency: Chip Law Group
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@25de87b4
- International Application: PCT/JP2016/085739 WO 20161201
- International Announcement: WO2017/138234 WO 20170817
- Main IPC: G11C13/00
- IPC: G11C13/00 ; G11C7/24 ; G11C17/14 ; G11C7/20 ; G11C11/56

Abstract:
Provided is an initialization control unit that causes a resistance value of a variable resistive element in an access restriction region to be changed to an initial value larger than a predetermined value. The resistance value is changed in a read only mode among the read only mode in which writing to the access restriction region is prohibited and a writable mode in which the writing to the access restriction region is permitted. The access restriction region is in a memory cell array in which the variable resistive elements are arranged, and the initialization control unit transitions to the writable mode. In addition, a write control unit causes a resistance value of an element corresponding to write data among the variable resistive elements in the access restriction region to be changed to a value smaller than the initial value in the writable mode, and transitions to the read only mode.
Public/Granted literature
- US20190035460A1 MEMORY CONTROLLER, MEMORY SYSTEM, AND MEMORY CONTROLLER CONTROL METHOD Public/Granted day:2019-01-31
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