Invention Grant
- Patent Title: Reducing off-state leakage current in Si/SiGe dual channel CMOS
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Application No.: US16109512Application Date: 2018-08-22
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Publication No.: US10672643B2Publication Date: 2020-06-02
- Inventor: Injo Ok , Choonghyun Lee , Soon-Cheon Seo , Seyoung Kim
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Michael J. Chang, LLC
- Agent Vazken Alexanian
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/8238 ; H01L29/66 ; H01L27/092 ; H01L21/762 ; H01L21/3105 ; H01L21/768 ; H01L29/06

Abstract:
Techniques for reducing off-state current in dual channel CMOS devices are provided. In one aspect, a method for forming a dual channel finFET includes: patterning NFET/PFET fins on a wafer from a first channel material and a second Ge-containing channel material; depositing a GeO2 layer on the fins; annealing the fins to selectively oxidize the at least one PFET fin; depositing a liner onto the fins which induces a negative charge in the PFET fin(s); removing unreacted GeO2 and the liner from the NFET fin(s); depositing a dielectric layer onto the fins which induces a positive charge in the NFET fin(s). A dual channel finFET device is also provided.
Public/Granted literature
- US20200066600A1 Reducing Off-State Leakage Current in Si/SiGe Dual Channel CMOS Public/Granted day:2020-02-27
Information query
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