Invention Grant
- Patent Title: Method for forming structure of dual damascene structures having via hole and trench
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Application No.: US15888906Application Date: 2018-02-05
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Publication No.: US10672651B2Publication Date: 2020-06-02
- Inventor: Tai-Yen Peng , Jyu-Horng Shieh
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/311

Abstract:
A structure and a formation method of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a conductive feature over the semiconductor substrate. The semiconductor device structure also includes a dielectric layer over the conductive feature and the semiconductor substrate and a via hole in the dielectric layer. The via hole has an oval cross section. The semiconductor device structure further includes a trench in the dielectric layer, and the via hole extends from a bottom portion of the trench. The trench has a trench width wider than a hole width of the via hole. In addition, the semiconductor device structure includes one or more conductive materials filling the via hole and the trench and electrically connected to the conductive feature.
Public/Granted literature
- US20180158722A1 STRUCTURE OF DUAL DAMASCENE STRUCTURES HAVING VIA HOLE AND TRENCH Public/Granted day:2018-06-07
Information query
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