Invention Grant
- Patent Title: Circuit and method for testing gate lines of array substrate
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Application No.: US15523081Application Date: 2017-03-14
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Publication No.: US10672675B2Publication Date: 2020-06-02
- Inventor: Anshi Li
- Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
- Applicant Address: CN Wuhan
- Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Wuhan
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2d1ae216
- International Application: PCT/CN2017/076555 WO 20170314
- International Announcement: WO2018/152884 WO 20180830
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G02F1/1362 ; G02F1/1345

Abstract:
Related to is a gate on array. A circuit for testing a gate line of an array substrate includes: a test pad and a first switch unit which connects the test pad and the gate line and has an end connected to a control terminal. A voltage is applied to the control terminal to control activation and deactivation of the first switch unit. The gate line is in normal operation when the first switch unit is deactivated, and the test pad tests a signal of the gate line when the first switch unit is activated. In normal display, the first switch unit is deactivated, and the gate line is in normal operation. This can avoid influences of an additional load, which would otherwise cause abnormal display of a picture. In a manufacturing procedure, explosive wound caused by electrostatic discharge of the test pad can be prevented. When a display device cannot be lit, an external voltage can be introduced to activate the first switch unit, so as to detect a signal of the gate line.
Public/Granted literature
- US20180331001A1 CIRCUIT AND METHOD FOR TESTING GATE LINES OF ARRAY SUBSTRATE Public/Granted day:2018-11-15
Information query
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