Invention Grant
- Patent Title: Semiconductor device
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Application No.: US15906536Application Date: 2018-02-27
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Publication No.: US10672706B2Publication Date: 2020-06-02
- Inventor: Yoshitaka Kimura
- Applicant: ABLIC Inc.
- Applicant Address: JP Chiba
- Assignee: ABLIC INC.
- Current Assignee: ABLIC INC.
- Current Assignee Address: JP Chiba
- Agency: Brinks, Gilson & Lione
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@565cd890
- Main IPC: H01L23/525
- IPC: H01L23/525 ; H01L21/768 ; H01L23/522 ; H01L23/532

Abstract:
A semiconductor device includes a multilayer wiring structure on a substrate. The multilayer wiring structure includes: a top wiring; a fuse element, which is located on a lower layer-side of the top wiring, and is made of metal having a melting point that is higher than that of the top wiring; and a lower-layer wiring, which is connected to each of ends of the fuse element. Provided is a semiconductor device in which fuse elements made of the high-melting point metal are arranged at high density.
Public/Granted literature
- US20180261541A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-09-13
Information query
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