Invention Grant
- Patent Title: Interconnect structures with reduced capacitance
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Application No.: US16000174Application Date: 2018-06-05
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Publication No.: US10672710B2Publication Date: 2020-06-02
- Inventor: Sunil Kumar Singh , Shesh Mani Pandey
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Calderon Safran & Cole, P.C.
- Agent Anthony Canale; Andrew M. Calderon
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L21/768 ; H01L21/02 ; H01L23/522

Abstract:
The present disclosure relates to semiconductor structures and, more particularly, to interconnect structures with reduced capacitance and methods of manufacture. The method includes: forming one or more lower metal lines in a dielectric material; forming an airgap structure in an upper dielectric material above the one or more lower metal lines, by subjecting material to a curing process; and forming an upper metal structure above the airgap structure.
Public/Granted literature
- US20190371736A1 INTERCONNECT STRUCTURES WITH REDUCED CAPACITANCE Public/Granted day:2019-12-05
Information query
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