Invention Grant
- Patent Title: Wafer level package structure with internal conductive layer
-
Application No.: US15776051Application Date: 2015-12-23
-
Publication No.: US10672731B2Publication Date: 2020-06-02
- Inventor: Sven Albers , Klaus Reingruber , Georg Seidemann , Christian Geissler , Richard Patten
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/EP2015/081133 WO 20151223
- International Announcement: WO2017/108122 WO 20170629
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L23/00 ; H01L23/433 ; H01L21/56 ; H01L21/48 ; H01L23/31 ; H01L23/36 ; H01L23/498
Abstract:
An apparatus is described that includes a redistribution layer and a semiconductor die on the redistribution layer. An electrically conductive layer resides over the semiconductor die. A compound mold resides over the electrically conductive layer.
Public/Granted literature
- US20180358317A1 WAFER LEVEL PACKAGE STRUCTURE WITH INTERNAL CONDUCTIVE LAYER Public/Granted day:2018-12-13
Information query
IPC分类:
