Semiconductor structures are provided. A first source and drain region of a first transistor is electrically connected to a first conductive line through a first contact and a first via over the first contact. A first gate electrode of the first transistor is electrically connected to a second conductive line through a second contact and a second via over the second contact. A second source and drain region of a second transistor is electrically connected to a third conductive line through a third contact and a third via over the third contact. A second gate electrode of the second transistor is electrically connected to a fourth conductive line of the metal layer directly through a fourth via. Projections of the second via and the first channel region are separated on the substrate, and projections of the fourth via and the second channel region are overlapped on the substrate.