Invention Grant
- Patent Title: Bit line gate structure of dynamic random access memory (DRAM) and forming method thereof
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Application No.: US15900800Application Date: 2018-02-21
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Publication No.: US10672774B2Publication Date: 2020-06-02
- Inventor: Yi-Wei Chen , Pin-Hong Chen , Tsun-Min Cheng , Chun-Chieh Chiu
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Agent Winston Hsu
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@628e787e
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L21/285 ; H01L21/3215 ; H01L23/532

Abstract:
A method of forming a bit line gate structure of a dynamic random access memory (DRAM) includes the following steps. A polysilicon layer is formed on a substrate. A sacrificial layer is formed on the polysilicon layer. An implantation process is performed on the sacrificial layer and the polysilicon layer. The sacrificial layer is removed. A metal stack is formed on the polysilicon layer. The present invention also provides another method of forming a bit line gate structure of a dynamic random access memory (DRAM) including the following steps. A polysilicon layer is formed on a substrate. A plasma doping process is performed on a surface of the polysilicon layer. A metal stack is formed on the surface of the polysilicon layer.
Public/Granted literature
- US20190252390A1 BIT LINE GATE STRUCTURE OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) AND FORMING METHOD THEREOF Public/Granted day:2019-08-15
Information query
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