Invention Grant
- Patent Title: Semiconductor device and electronic device
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Application No.: US16411663Application Date: 2019-05-14
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Publication No.: US10674168B2Publication Date: 2020-06-02
- Inventor: Yoshiyuki Kurokawa
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@51414ec2 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@549f8289
- Main IPC: H04N19/423
- IPC: H04N19/423 ; H01L27/12 ; G11C27/02 ; G06T9/00 ; H04N19/90 ; G06N3/08 ; G06N3/063 ; H04N19/43 ; H04N19/527 ; H04N19/543 ; G06N3/04 ; G11C27/00 ; H01L29/24 ; H01L29/786

Abstract:
A semiconductor device with a novel structure is provided. Input neuron circuits, hidden neuron circuits, and output neuron circuits are hierarchically connected to one another through plural synapse circuits. Each synapse circuit includes an analog memory which stores data corresponding to a connection strength between the input neuron circuit and the hidden neuron circuit or between the hidden neuron circuit and the output neuron circuit, a writing circuit which changes the data in the analog memory, and a weighting circuit which outputs an output signal obtained by weighting an input signal in accordance with data in the analog memory. The analog memory is formed using a transistor including an oxide semiconductor having extremely low off-state current. It is not necessary to mount a large-scale capacitor for holding data and to recover analog data by regular refresh operation; thus, reduction in a chip area and reduction in power consumption are possible.
Public/Granted literature
- US20190342565A1 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE Public/Granted day:2019-11-07
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