An abnormal state latch unit comprises: an detection circuit that masks an abnormality position signal; a timer circuit that starts motion when the abnormality position signal indicates the occurrence of an abnormality based on the abnormality position signal, and completes the motion and outputs a reset signal after passage of a predetermined period; and a latch circuit that latches the abnormality position signal output from the detection circuit when the reset signal is output. The detection circuit masks the abnormality position signal when the latch circuit makes latching motion to disable an output from the detection circuit. The timer circuit masks an input to the timer circuit when the latch circuit makes the latching motion to maintain a state indicating completion of the motion. Abnormality voltage signals generated by an signal generation circuit are wired-OR connected and supplied through a single signal line to a monitor circuit.