Invention Grant
- Patent Title: Peripheral based memory safety scheme for multi-core platforms
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Application No.: US16206066Application Date: 2018-11-30
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Publication No.: US10678474B1Publication Date: 2020-06-09
- Inventor: Marcel Medwed , Jan Hoogerbrugge , Ventzislav Nikov
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G06F13/24

Abstract:
A computing system using low-fat pointers, including: a memory configured to be accessed by the low-fat pointers; a processing core configured to access the memory; an interrupt controller configured to receive interrupts and to communicate interrupts to processes running on the processing core; and a memory safety peripheral configured to receive a pointer request, wherein the pointer is a low-fat pointer and to verify that the pointer request is within required memory bounds.
Public/Granted literature
- US20200174694A1 PERIPHERAL BASED MEMORY SAFETY SCHEME FOR MULTI-CORE PLATFORMS Public/Granted day:2020-06-04
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